1. Field of the Invention
The present invention relates generally to phase-locked loop frequency synthesizers, and more specifically to such a frequency synthesizer capable of canceling undesired phase differences which occur as a result of dividing clock pulses from a voltage controlled oscillator.
2. Description of the Related Art
The phase-locked loop frequency synthesizer includes a variable frequency divider for dividing the clock frequency of the voltage-controlled oscillator with a variable scaling factor k and a phase comparator for detecting a phase difference between the output of the divider and a reference frequency clock pulse to produce a feedback signal for controlling the clock frequency of the VCO. Since the output frequency f.sub.o of the VCO is the integral multiple (k) of the reference frequency f.sub.r, the usual practice is to use a large value for the scaling factor k in order to achieve precision control on the VCO frequency. However, it takes long for the phase-locked loop to attain stability following a change in the scaling factor.
To overcome this problem Japanese Provisional Patent Publication (Tokkaisho) 63-28131 discloses a phase-locked loop frequency synthesizer in which every "s" clock pulses from the VCO are counted to define an interval. During this interval, (k+1) input clock pulses are counted to produce "m" output pulses and "k" input pulses are subsequently counted to produce "s-m" output pulses. A phase difference detected between the "m" and "s-m" output pulses and a reference clock pulses to control the VCO, which produces an output frequency equal to {k+(m/s)}f.sub.r. Since variation occurs at the output of the phase comparator at intervals corresponding to "s" clock pulses, an analog ramp circuit is provided to generate a ramp pulse. This ramp pulse is supplied to a loop filter where it is combineed with the output of the phase comparator to cancel the undesired phase variation.
However, since the output of the phase comparator is a series of discrete pulses, the use of analog ramp pulses is not satisfactory for precision cancellation of phase variation. This results in the generation of an error in the phase comparator output, causing instability of the VCO output frequency.